/**
 * @file app_init._EDG_COMPILER
 * @author  xiaowine (xiaowine@sina.cn)
 * @brief
 * @version 01.00
 * @date    2025-04-05
 *
 * @copyright Copyright (c) {2020}  xiaowine
 *
 * @par 修改日志:
 * <table>
 * <tr><th>Date       <th>Version <th>Author  <th>Description
 * <tr><td>2025-04-05 <td>1.0     <td>wangh     <td>内容
 * </table>
 * ******************************************************************
 * *                   .::::
 * *                 .::::::::
 * *                ::::::::::
 * *             ..:::::::::::
 * *          '::::::::::::
 * *            .:::::::::
 * *       '::::::::::::::..        女神助攻,流量冲天
 * *            ..::::::::::::.     永不宕机,代码无bug
 * *          ``:::::::::::::::
 * *           ::::``:::::::::'        .:::
 * *          ::::'   ':::::'       .::::::::
 * *        .::::'      ::::     .:::::::'::::
 * *       .:::'       :::::  .:::::::::' ':::::
 * *      .::'        :::::.:::::::::'      ':::::
 * *     .::'         ::::::::::::::'         ``::::
 * * ...:::           ::::::::::::'              ``::
 * *```` ':.          ':::::::::'                  ::::.
 * *                   '.:::::'                    ':'````.
 * ******************************************************************
 */

/* Private includes ----------------------------------------------------------*/
#include "app_init.h"
#include "helper_functions.h"

/* Private typedef -----------------------------------------------------------*/

/* Private define ------------------------------------------------------------*/

/* Private macro -------------------------------------------------------------*/

/* Private variables ---------------------------------------------------------*/

uint16_t delayValue;
uint16_t value = 0;

uint16_t adcRawValue1[20] = {0};
uint8_t  PDB0DoneFlag     = 0;
/* configuration structures for simple loop transfers */
edma_loop_transfer_config_t loopConfig = {
    .majorLoopIterationCount = 0,
    .srcOffsetEnable         = false,
    .dstOffsetEnable         = false,
    .minorLoopOffset         = 0,
    .minorLoopChnLinkEnable  = false,
    .minorLoopChnLinkNumber  = 0,
    .majorLoopChnLinkEnable  = false,
    .majorLoopChnLinkNumber  = 0,
};

edma_transfer_config_t transferConfig = {
    .srcAddr                   = 0,
    .destAddr                  = 0,
    .srcTransferSize           = EDMA_TRANSFER_SIZE_2B,
    .destTransferSize          = EDMA_TRANSFER_SIZE_2B,
    .srcOffset                 = 4,
    .destOffset                = 2,
    .srcLastAddrAdjust         = 0,
    .destLastAddrAdjust        = 0,
    .srcModulo                 = EDMA_MODULO_OFF,
    .destModulo                = EDMA_MODULO_OFF,
    .minorByteTransferCount    = 2,
    .scatterGatherEnable       = false,
    .scatterGatherNextDescAddr = 0,
    .interruptEnable           = false,
    .loopTransferConfig        = &loopConfig,
};
uint32_t pdb0Cnt = 0;
/* Private function prototypes -----------------------------------------------*/

/* Private user code ---------------------------------------------------------*/

void PDB0_IRQHandler(void) {
    // ADC_DRV_GetChanResult(INST_ADCONV0, 0U, &adcRawValue1[0]);
    // ADC_DRV_GetChanResult(INST_ADCONV0, 1U, &adcRawValue1[1]);
    // ADC_DRV_GetChanResult(INST_ADCONV0, 2U, &adcRawValue1[2]);
    // ADC_DRV_GetChanResult(INST_ADCONV0, 3U, &adcRawValue1[3]);
    // ADC_DRV_GetChanResult(INST_ADCONV0, 4U, &adcRawValue1[4]);
    // ADC_DRV_GetChanResult(INST_ADCONV0, 5U, &adcRawValue1[5]);
    // ADC_DRV_GetChanResult(INST_ADCONV0, 6U, &adcRawValue1[6]);
    // ADC_DRV_GetChanResult(INST_ADCONV0, 7U, &adcRawValue1[7]);
    pdb0Cnt++;
    // clear interrupt flag
    PDB_DRV_ClearTimerIntFlag(INST_PDB0);
    PDB0DoneFlag = 1;
}

void PDB0_init() {
    PDB_DRV_Init(INST_PDB0, &pdb0_InitConfig0);
    PDB_DRV_Enable(INST_PDB0);

    // config 8 pretriggers on ch0 based on component setting
    PDB_DRV_ConfigAdcPreTrigger(INST_PDB0, 0UL, &pdb0_AdcTrigInitConfig0);
    PDB_DRV_ConfigAdcPreTrigger(INST_PDB0, 0UL, &pdb0_AdcTrigInitConfig1);
    PDB_DRV_ConfigAdcPreTrigger(INST_PDB0, 0UL, &pdb0_AdcTrigInitConfig2);
    PDB_DRV_ConfigAdcPreTrigger(INST_PDB0, 0UL, &pdb0_AdcTrigInitConfig3);
    PDB_DRV_ConfigAdcPreTrigger(INST_PDB0, 0UL, &pdb0_AdcTrigInitConfig4);
    PDB_DRV_ConfigAdcPreTrigger(INST_PDB0, 0UL, &pdb0_AdcTrigInitConfig5);
    PDB_DRV_ConfigAdcPreTrigger(INST_PDB0, 0UL, &pdb0_AdcTrigInitConfig6);
    PDB_DRV_ConfigAdcPreTrigger(INST_PDB0, 0UL, &pdb0_AdcTrigInitConfig7);

    // set PDB0 counter period to delayValue (~30us)
    PDB_DRV_SetTimerModulusValue(INST_PDB0, (uint32_t)delayValue);
    PDB_DRV_SetValueForTimerInterrupt(INST_PDB0, delayValue - 1);
    PDB_DRV_LoadValuesCmd(INST_PDB0);
    PDB_DRV_SoftTriggerCmd(INST_PDB0);

    INT_SYS_InstallHandler(PDB0_IRQn, &PDB0_IRQHandler, (isr_t *)0U);
    // INT_SYS_EnableIRQ(PDB0_IRQn);
}

/* This function triggers a loop memory-to-memory transfer. */
void triggerLoopTransfer(uint8_t channel, uint8_t *srcBuff, uint16_t *dstBuff, uint32_t size) {
    // transferComplete = false;

    dma_request_source_t DmaReq;

    /* configure transfer source and destination addresses */
    transferConfig.srcAddr             = (uint32_t)srcBuff;
    transferConfig.destAddr            = (uint32_t)dstBuff;
    transferConfig.srcLastAddrAdjust   = -(4 * size);
    transferConfig.destLastAddrAdjust  = -(2 * size);
    loopConfig.majorLoopIterationCount = size;

    if (channel == 0) {
        DmaReq = EDMA_REQ_ADC0;
    }
    else {
        DmaReq = EDMA_REQ_ADC1;
    }

    /* configure the eDMA channel for a loop transfer (via transfer configuration structure */
    EDMA_DRV_ConfigLoopTransfer(channel, &transferConfig);

    /* select hw request */
    EDMA_DRV_SetChannelRequestAndTrigger(channel, DmaReq, false);

    /* start the channel */
    EDMA_DRV_StartChannel(channel);
}
void DMA_Init(void) {
    EDMA_DRV_Init(&dmaController1_State, &dmaController1_InitConfig0, edmaChnStateArray, edmaChnConfigArray,
                  EDMA_CONFIGURED_CHANNELS_COUNT);

    // set DMA ch0 to read first 16 ADC0 Results registers and move it to buffer array starting from 1st element
    triggerLoopTransfer(DMA_CHANNEL0, (uint8_t *)&(ADC0->R[0]), adcRawValue, 16);
}

// DMA channel0 callback
void DMA_ADC0_CHANNEL0(void *parameter, edma_chn_status_t status) {
    (void)status;
    (void)parameter;

    value = adcRawValue[0];
}

// DMA channel1 callback
void DMA_ADC1_CHANNEL1(void *parameter, edma_chn_status_t status) {
    (void)status;
    (void)parameter;
}

void app_init(void) {

    ADC0_Init();

    if (!calculateIntValue(&pdb0_InitConfig0, PDLY_TIMEOUT, &delayValue)) {
        /* Stop the application flow */
        while (1);
    }

    DMA_Init();
    PDB0_init();
}
